This invention relates to switched capacitor circuits and more particularly to a switched capacitor circuit for simulating a floating inductor that is generally insensitive to parasitic capacitance effects associated with integrated capacitors thereof.
Fully integrated circuits including active filters require networks for simulating inductors since they can not be fabricated directly in integrated circuit form. Switched capacitor techniques have therefore evolved for providing networks that simulate inductors, as well as other types of circuit elements such as resistors, gyrators and FDNR's. Switched capacitor networks for simulating grounded inductors are disclosed in: Switched-Capacitor Simulation of Grounded Inductors and Gyrators by B. J. Hosticka and G. S. Moschytz, Electronics Letters, Nov. 23, 1978, Vol. 14, No. 24, pages 788-790; Switched-Capacitor Simulation of Grounded Inductors Using Operational-Amplifier Pole by E. Sanchez-Sinencio and E. L. Gomes-Osoric, Electronics Letters, Mar. 15, 1979, Vol. 15, No. 6, pages 169-170; and Switched-Capacitor Transconductance Elements and Gyrators by T. R. Viswanathan, J. Vlach, and K. Singhal, Electronics Letters, May 24, 1979, Vol. 15, No. 11, pages 318-319. Switched capacitor networks for simulating floating inductors are described in: Switched-Capacitor Circuits Bilinearly Equivalent to Floating Inductor or FDNR, by G. C. Temes and M. Jahanbegloo, Electronics Letters, Feb. 1, 1979, Vol. 15, No. 3, pages 87-88; and Basic Principles of Switched-Capacitor Filters Using Voltage Inverter Switches, by A. Fettweis, Arch. Electron. & Ubertragungstech., 1979, Vol. 33, pages 13-19. A principal drawback of these floating inductor simulation circuits is that both plates of some integrated capacitors of the circuits are switched between floating nodes. This means that the simulated inductor is sensitive to parasitic capacitance effects associated with both plates of integrated capacitors thereof. In a floating MOS integrated capacitor, the bottom plate parasitic capacitance, for example, is the stray capacitance between the bottom electrode of the integrated capacitor and a substrate that is normally at AC ground potential. The parasitic capacitance associated with the top plate of such an integrated capacitor is known to be small such that its effect is usually negligible. Compensation techniques are required, however, to eliminate the effect of parasitic capacitance associated with the bottom plate of a floating capacitor. Compensation schemes are described in the article, "Compensation for Parasitic Capacitances in Switched-Capacitor Filters," by G. C. Temes and R. Gregorian, Electronics Letters, 1979, Vol. 15, pages 377-379. An object of this invention is the provision of an improved switched capacitor floating inductor simulation circuit. Another object is provision of a switched capacitor floating inductor simulation circuit that is relatively insensitive to parasitic capacitance effects associated with the plates of integrated capacitors thereof.